1. Field of the Invention
This invention relates to a liquid crystal display of high visual quality and more particularly to a high density wiring arrangement for controlling the liquid crystal display.
2. Background of the Relevant Art
The visual quality of an image depicted upon a liquid crystal display (LCD) is often determined by several factors such as contrast, resolution and speed. Operating as light modifiers, pixels within the LCD act to either transmit a remote, ambient light source or block that source. The difference between the amount of light transmitted versus that which is blocked is often called the "contrast ratio." A LCD having a higher contrast ratio is capable of producing images that are sharper and clearer than LCDs having lower contrast ratio. High contrast ratio can be achieved by ensuring the control circuit for each pixel area is either completely on or completely off. Recent advances in thin-film transistor (TFT) technology allows the control circuitry for each pixel to fully drive the corresponding pixel to either an on or off state. A LCD having TFTs placed adjacent each pixel to enduce full operational range of the pixel is often referred to as an "active matrix" display.
TFTs are also advantageously used to increase the speed of an object depicted on the LCD. A quickly moving object or image can be registered without "ghosting" or "smearing" the image only if the amount of current and/or voltage to the TFT is carefully controlled. Furthermore, attention must be paid to minimizing cross-coupling between control conductors or wires feeding the TFTs. One method in which to improve the visual quality of a moving image and thereby reduce ghosting and smearing is to ensure the TFT associated with each pixel turns on and off quickly. While the speed of any particular LCD is somewhat dependent upon the amount of time it takes the liquid crystal media to respond to an electric field, speed is more so dependent upon the rapidity by which the control circuit or LCD operates. By maintaining TFT operation within its linear range, the pixel or display electrode attached to the source-drain path of the TFT can be modulated more quickly to ensure rapid appearance or disappearance of corresponding electric field. It is important that the TFT not be driven deeply into the saturation region, for operation in the saturation region will lengthen the response time of the display electrode.
For many LCD applications such as flat screen televisions and computer monitors, it is important that the display exhibit high resolution. To increase resolution, pixel area or display electrode area associated with high resolution LCDs must be extremely small. In some instances, the pixel area must be maintained below 0.024 sq. mm. It is equally important that a large number of display electrode are placed in the smallest area possible. Further, the conductors or wires which control the plurality of TFTs must be both transparent and extremely small in diameter or cross-sectional area. Transparent conductors are well known and are generally made of indium tin oxide. Even though the conductors are transparent, densely placed display electrodes generally require more conductor area in order to accommodate the increased number of pixels. Even if only a couple conductors are needed per pixel, the conductors will nevertheless occupy a substantial portion of the LCD total area. This leaves less area available for the pixel or display electrodes which are often forced to occupy the same plane as the conductors. Each display electrode must be spaced further from adjacent electrodes and must also be reduced in size in order to accommodate the control conductors placed between the electrodes. An increase in spacing can cause a noticeable reduction in the viewing quality. The image boundary may appear granular instead of being sharp and focused.
To more fully understand some of the concepts and problems outlined hereinabove, FIG. 1 illustrates an exploded view of LCD 10 according to a prior design. LCD 10 includes a pair of substantially transparent glass panels 12 and 14, and on the outer surface of each glass panel is a polarizer filter. Polarizer filter associated with panel 12 is denoted as reference numeral 16, and polarizer filter associated with panel 14 is denoted as reference numeral 18. On the inside surface of glass panel 12 is a common electrode 20, often called the backplane of the LCD, which extends across virtually the entire display surface. On the inside surface of glass panel 14 is a lithography produced topography comprising a matrix or grid of orthogonally placed conductors, active devices (or TFTs), and separate electrodes (or display electrodes). The conductors are used to carry video data and addressing signals sent from a remote source. Specifically, electrodes which receive video data are designated as bit lines 22, wherein the bit lines are shown spaced parallel from each other. Video data on one bit line can be read into a select display electrode 26 by a word line 24 spaced parallel to other word lines and substantially perpendicular to each bit line. Word lines 24 are thereby used to randomly address a select display electrode 26 with video data contained with a respective bit line 22. The addressing scheme and methodology is well known and generally follows standard dynamic random access memory (DRAM) multiplexing techniques. Placed adjacent each display electrode 26 is a pass-gate transistor 28 which, depending upon the voltage state upon its gate terminal, transmits bit line video data to electrode 36. Additional details regarding the layout and configuration of bit lines 22, word lines 24, display electrodes 26 and pass-gate transistors 28 are provided hereinbelow.
Placed over the inside surface topography of conductors 22 and 24, over transistors 28 and over display electrodes 26 is a dielectric layer (not shown) of sufficient insulative quality to electrically isolate bit lines 22, word lines 24, and transistors 28 from each other and from an adjacent liquid crystal medium 30. When brought together, liquid crystal medium 30 is in contact with the dielectric material and is in electric field contact with display electrodes 26 which are voided of dielectric material immediately thereabove by standard etching techniques. It is understood that alignment coatings and/or passivation coatings (not shown) are generally placed between electrode 20 and liquid crystal medium 30 as well as between each display electrode 26 and liquid crystal medium 30 to ensure current flow will not occur through the medium and that only electric field will be selectively present.
LCDs operate by either allowing the transferral of light or by blocking the transferral of light between the panels at select regions, often called "pixel regions" generally represented by the geometric size of individual display electrodes 28. Incoherent ambient light can be transmitted or reflected into one surface of LCD 10 allowing filter 18 to polarize light 32 to a coherent, linearly polarized state. The polarized light can either be re-aligned such that it passes through second filter 16 or, if electric field is present, the light can be blocked by second filter 16. Accordingly, sections of light or pixel regions can present themselves as relatively light or relatively dark areas necessary for visual contrast detection.
Referring now to FIG. 2, a three-dimensional circuit schematic of the active control matrix, including pass-gate transistors associated with a prior design LCD is shown. A plurality of cells forming a matrix are shown, each cell having a display electrode 26 connected to the source-drain path of pass-gate transistor 28. Each pass-gate transistor is activated by an appropriate voltage level upon its gate. Pass-gate transistors are manufactured upon glass panel 14 according to standard semiconductor processing and may be configured as thin-film, n-channel, enhancement-type MOSFETs. Once the voltage upon word line 24 exceeds a threshold amount, pass-gate transistor 28 allows video data within respective bit line 22 to pass through the source-drain path and onto display electrode 26. Common electrode 20 provides a uniform voltage state upon one side of liquid crystal media 30 such that electric field selectivity is entirely controlled by the voltage state of respective display electrodes 26 and its associated bit line 22 voltage.
Referring now to FIG. 3, a two-dimensional circuit schematic of the prior design active control matrix of FIG. 2 is shown. By activating a select word line 24, respective pass-gate transistor 28 allows a conductive path to form between an activated, associated bit line 22 and display electrode 26. Absent a buffering source placed on the charged terminal of the pass-gate transistor adjacent each display electrode, the data placed thereon may slowly discharge from its charged state to an illegible voltage state. Thus, many conventional control matrices must be periodically refreshed to ensure legible charge remains on the display electrode. Refresh generally forces, for example, a VGA controller to continuously update unchanged pixels thereby consuming valuable bandwidth access into the DRAM and reducing high performance LCD drawing operations.
In an effort to overcome the problem of having to continuously refresh unchanged pixels, a memory element 34 may be placed between pass-gate transistors 28 and display electrode 26 as shown in FIG. 4. As described in co-pending patent application Ser. No. 08/055,174 filed concurrently herewith, memory element 34, capable of receiving power, not only provides static memory but also buffers charge to the display electrode thereby increasing contrast and speed of the LCD. Coupled to each memory element 34 are a pair of conductors 36 and 38 capable of receiving power signals such as VDD and ground. Thus, each power signal or supply requires a conductor to extend a spaced distance from respective bit and word lines 22 and 24. Memory element consumes relatively small amounts of real estate when compared with the total area taken by the added power conductors extending across numerous, densely packed pixel elements. To compensate for the added conductor area, each pixel within the array or matrix must be reduced in size and the spacing between pixels increased. As described above, reduction in pixel size and increase in spacing adds to the granularity of the image and reduces the sharpness and fine line detail at the image boundary. Unless a solution can be found, high quality, high resolution LCDs having static memory and charge buffering capability cannot be obtained.